1. Field of the Invention
The present invention relates generally to a process of fabricating a semiconductor device, and, more particularly, the present invention relates to a process of fabricating a semiconductor device in which bipolar transistors having different conducting types are formed in the same substrate.
2. Description of the Related Art
In a semiconductor device which includes a bipolar transistor circuit, high speed operation of the circuit is achieved by forming the circuit of an NPN bipolar transistor (hereinafter, referred to as the Tr) of a double polysilicon structure capable of making a gap between an emitter and a base contact portion more narrow. The function of such a semiconductor device including the high speed NPN Tr of a double polysilicon structure can be increased by forming a complementary circuit in which a PNP Tr is formed together with the NPN Tr in the same semiconductor substrate. In this case, the PNP Tr is formed of a single polysilicon structure capable of being formed in a reduced number of steps. In the Tr having such a single polysilicon structure, it is possible to ensure the breakdown voltage between the emitter and base by increasing the gap between the emitter and a base contact portion, by making an impurity distribution in the emitter deep, and reducing the concentration of an impurity in a junction between the emitter and the base.
In the manufacturing process sequence for the above referenced semiconductor device, emitters, bases and collectors of the NPN Tr and PNP Tr are formed in individual steps. Incidentally, in the semiconductor device formed of the above complementary circuit, it is necessary to make shallower and higher the profile of the impurity in the base and to make the concentration of an impurity in the emitter higher, for increasing the cut-off frequency of the above NPN Tr. The result is that in such an NPN Tr, the breakdown voltage between the emitter and base becomes lower. However, to satisfy the recent diversified applications of semiconductor devices, there has been a strong demand for a complementary circuit including the above-described NPN Tr and the PNP Tr added with an NPN Tr having a high breakdown voltage.
In order to provide a semiconductor device having the above described complementary circuit, it is necessary to form an NPN Tr of a single polysilicon structure separately from the above NPN Tr of a double polysilicon structure on the semiconductor substrate. That is, in such a semiconductor device, a NPN Tr and a PNP Tr, each having a single polysilicon structure, are disposed together with a high speed NPN Tr on the same semiconductor substrate.
In the case of forming an NPN Tr and a PNP Tr each having a single polysilicon structure on the same semiconductor substrate or in the case where a Tr of a double polysilicon structure are formed together with the above Trs on the same semiconductor substrate, diffusion layers of the Trs are formed in individual steps, with the result that the processing sequence is complicated, leading to the increased cost.